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| author | Brian Woods | 2023-03-23 22:30:40 -0400 |
|---|---|---|
| committer | Brian Woods | 2023-03-23 22:39:44 -0400 |
| commit | 2e5b437fc94aa989ca81aa820739178281d218d8 (patch) | |
| tree | e4810865577993efb28545d914ad7b01e8ba58f7 /counter/simulation.vhd | |
| parent | ac193d21bf29672513afbab5102708e0d4fee61e (diff) | |
counter_v: add counter example in verilog
Uses icarus verilog and gtkwave to simulate a simple counter.
Diffstat (limited to 'counter/simulation.vhd')
0 files changed, 0 insertions, 0 deletions